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WSC
2004
15 years 8 months ago
Implementing the High Level Architecture in the Virtual Test Bed
The Virtual Test Bed (VTB) is a prototype of a virtual engineering environment to study operations of current and future space vehicles, spaceports, and ranges. The HighLevel Arch...
José A. Sepúlveda, Luis C. Rabelo, J...
TSMC
2010
15 years 1 months ago
An Architecture for Adaptive Algorithmic Hybrids
We describe a cognitive architecture for creating more robust intelligent systems by executing hybrids of algorithms based on different computational formalisms. The architecture ...
Nicholas L. Cassimatis, Perrin G. Bignoli, Magdale...
IEEEPACT
2007
IEEE
16 years 29 days ago
A Flexible Heterogeneous Multi-Core Architecture
Multi-core processors naturally exploit thread-level parallelism (TLP). However, extracting instruction-level parallelism (ILP) from individual applications or threads is still a ...
Miquel Pericàs, Adrián Cristal, Fran...
EWSA
2004
Springer
16 years 1 days ago
An Architecture Description Language for Mobile Distributed Systems
Mobile software applications have to meet new requirements directly arising from mobility issues. To address these requirements at an early stage in development, an architecture d...
Volker Gruhn, Clemens Schäfer
DATE
2010
IEEE
154views Hardware» more  DATE 2010»
15 years 11 months ago
ERSA: Error Resilient System Architecture for probabilistic applications
There is a growing concern about the increasing vulnerability of future computing systems to errors in the underlying hardware. Traditional redundancy techniques are expensive for...
Larkhoon Leem, Hyungmin Cho, Jason Bau, Quinn A. J...