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IEEECIT
2010
IEEE
15 years 5 months ago
Superblock-Based Source Code Optimizations for WCET Reduction
—Superblocks represent regions in a program code that consist of multiple basic blocks. Compilers benefit from this structure since it enables optimization across block boundari...
Paul Lokuciejewski, Timon Kelter, Peter Marwedel
ICDE
1995
IEEE
180views Database» more  ICDE 1995»
16 years 8 months ago
Building an Integrated Active OODBMS: Requirements, Architecture, and Design Decisions
Active OODBMSs must provide e cient support for event detection, composition, and rule execution. Previous experience, reported here, building active capabilities on top of existi...
Alejandro P. Buchmann, Jürgen Zimmermann, Jos...
ISPASS
2006
IEEE
16 years 20 days ago
Critical path analysis of the TRIPS architecture
Fast, accurate, and effective performance analysis is essential for the design of modern processor architectures and improving application performance. Recent trends toward highly...
Ramadass Nagarajan, Xia Chen, Robert G. McDonald, ...
IEEEPACT
2005
IEEE
16 years 7 days ago
A Distributed Control Path Architecture for VLIW Processors
VLIW architectures are popular in embedded systems because they offer high-performance processing at low cost and energy. The major problem with traditional VLIW designs is that t...
Hongtao Zhong, Kevin Fan, Scott A. Mahlke, Michael...
FPGA
2008
ACM
136views FPGA» more  FPGA 2008»
15 years 8 months ago
A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs
Functional full-system simulators are powerful and versatile research tools for accelerating architectural exploration and advanced software development. Their main shortcoming is...
Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Bab...