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DATE
2010
IEEE
139views Hardware» more  DATE 2010»
15 years 9 months ago
Finding reset nondeterminism in RTL designs - scalable X-analysis methodology and case study
Due to increases in design complexity, routing a reset signal to all registers is becoming more difficult. One way to solve this problem is to reset only certain registers and rely...
Hong-Zu Chou, Haiqian Yu, Kai-Hui Chang, Dylan Dob...
ASPDAC
2008
ACM
103views Hardware» more  ASPDAC 2008»
15 years 8 months ago
Reliability-aware design for nanometer-scale devices
Continuous transistor scaling due to improvements in CMOS devices and manufacturing technologies is increasing processor power densities and temperatures; thus, creating challenges...
David Atienza, Giovanni De Micheli, Luca Benini, J...
ASPDAC
2008
ACM
200views Hardware» more  ASPDAC 2008»
15 years 8 months ago
Non-Gaussian statistical timing analysis using second-order polynomial fitting
In the nanometer manufacturing region, process variation causes significant uncertainty for circuit performance verification. Statistical static timing analysis (SSTA) is thus dev...
Lerong Cheng, Jinjun Xiong, Lei He
152
Voted
ISARCS
2010
164views Hardware» more  ISARCS 2010»
15 years 8 months ago
Increasing the Resilience of Critical SCADA Systems Using Peer-to-Peer Overlays
Abstract. Supervisory Control and Data Acquisition (SCADA) systems are migrating from isolated to highly-interconnected large scale architectures. In addition, these systems are in...
Daniel Germanus, Abdelmajid Khelil, Neeraj Suri
ASAP
2007
IEEE
175views Hardware» more  ASAP 2007»
15 years 7 months ago
Scalable Multi-FPGA Platform for Networks-On-Chip Emulation
Interconnect validation is an important early step toward global SoC (System-On-Chip) validation. Fast performances evaluation and design space exploration for NoCs (Networks-On-C...
Abdellah-Medjadji Kouadri-Mostefaoui, Benaoumeur S...