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» Evolving Hardware on a Large Scale
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ICCAD
1993
IEEE
104views Hardware» more  ICCAD 1993»
15 years 10 months ago
Parallel timing simulation on a distributed memory multiprocessor
Circuit simulation is one of the most computationally expensive tasks in circuit design and optimization. Detailed simulation at the level of precision of SPICE is usually perform...
Chih-Po Wen, Katherine A. Yelick
ASPDAC
2007
ACM
90views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Protocol Transducer Synthesis using Divide and Conquer approach
One of the efficient design methodologies for large scale System on a Chip (SoC) is IP-based design. In this methodology, a system is considered as a set of components and intercon...
Shigeru Watanabe, Kenshu Seto, Y. Ishikawa, Satosh...
DATE
2009
IEEE
115views Hardware» more  DATE 2009»
15 years 10 months ago
Customizing IP cores for system-on-chip designs using extensive external don't-cares
Traditional digital circuit synthesis flows start from an HDL behavioral definition and assume that circuit functions are almost completely defined, making don't-care conditio...
Kai-Hui Chang, Valeria Bertacco, Igor L. Markov
FPL
2006
Springer
96views Hardware» more  FPL 2006»
15 years 9 months ago
Reducing the Space Complexity of Pipelined Routing Using Modified Range Encoding
Interconnect delays are becoming an increasingly significant part of the critical path delay for circuits implemented in FPGAs. Pipelined interconnects have been proposed to addre...
Allan Carroll, Carl Ebeling
CARDIS
2010
Springer
159views Hardware» more  CARDIS 2010»
15 years 9 months ago
Modeling Privacy for Off-Line RFID Systems
This paper establishes a novel model for RFID schemes where readers are not continuously connected to the back office, but only periodically. Furthermore, adversaries are not only ...
Flavio D. Garcia, Peter van Rossum