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GLVLSI
2007
IEEE
189views VLSI» more  GLVLSI 2007»
16 years 18 days ago
Hardware-accelerated path-delay fault grading of functional test programs for processor-based systems
The path-delay fault simulation of functional tests on complex circuits such as current processor-based systems is a daunting task. The amount of computing power and memory needed...
Paolo Bernardi, Michelangelo Grosso, Matteo Sonza ...
ERSHOV
2009
Springer
16 years 25 days ago
Standardization and Testing of Mathematical Functions
Abstract. The article concerns problems of formulating standard requirements to implementations of mathematical functions working with floating-point numbers and conformance test ...
Victor V. Kuliamin
DATE
1998
IEEE
88views Hardware» more  DATE 1998»
15 years 10 months ago
Functional Scan Chain Testing
Functional scan chains are scan chains that have scan paths through a circuit's functional logic and flip-flops. Establishing functional scan paths by test point insertion (T...
Douglas Chang, Kwang-Ting Cheng, Malgorzata Marek-...
SAFECOMP
2005
Springer
15 years 11 months ago
Control and Data Flow Testing on Function Block Diagrams
As programmable logic controllers(PLCs) have been used in safety-critical applications, testing of PLC applications has become important. The previous PLC-based software testing te...
Eunkyoung Jee, Junbeom Yoo, Sung Deok Cha
DAC
1994
ACM
15 years 10 months ago
Functional Test Generation for FSMs by Fault Extraction
Recent results indicate that functional test pattern generation (TPG) techniques may provide better defect coverages than do traditional logic-level techniques. Functional TPG alg...
Bapiraju Vinnakota, Jason Andrews