An increasing computational demand is placed on the image processing capacity of current and future smart cameras. SIMD processor architectures provide an efficient solution becau...
In this paper, we will introduce to describe learning resources by using ontology model based on metadata of learning standard as Sharable Content Object Reference Model (SCORM) a...
In this paper we present a Design-for-Debug (DFD) reconfigurable infrastructure for SoCs to support at-speed in-system functional debug. A distributed reconfigurable fabric insert...
Miron Abramovici, Paul Bradley, Kumar N. Dwarakana...
Modern embedded processors access the Branch Target Buffer (BTB) every cycle to speculate branch target addresses. Such accesses, quite often, are unnecessary as there is no branc...
We examine the robustness of critical infrastructure networks in the face of terrorist attack, using a simulation experiment that incorporates link capacity; and an extension of d...