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FASE
2000
Springer
15 years 11 months ago
Parallel Refinement Mechanisms for Real-Time Systems
This paper discusses highly general mechanisms for specifying the refinement of a real-time system as a collection of lower level parallel components that preserve the timing and f...
Paul Z. Kolano, Richard A. Kemmerer, Dino Mandriol...
DIMVA
2004
15 years 9 months ago
Alarm Reduction and Correlation in Intrusion Detection Systems
: Large Critical Complex Infrastructures are increasingly dependent on IP networks. Reliability by redundancy and tolerance are an imperative for such dependable networks. In order...
Tobias Chyssler, Stefan Burschka, Michael Semling,...
CORR
2006
Springer
116views Education» more  CORR 2006»
15 years 7 months ago
Memory Aware High-Level Synthesis for Embedded Systems
We introduce a new approach to take into account the memory architecture and the memory mapping in the High- Level Synthesis of Real-Time embedded systems. We formalize the memory...
Gwenolé Corre, Eric Senn, Nathalie Julien, ...
JSAC
2006
95views more  JSAC 2006»
15 years 7 months ago
A low-rate code-spread and chip-interleaved time-hopping UWB system
We consider a code-spread and chip-interleaved time-hopping (TH) multiple-access scheme for multiuser ultra-wideband (UWB) communications. In such a system, each user's chip s...
Kai Li, Xiaodong Wang, Guosen Yue, Li Ping
TII
2008
98views more  TII 2008»
15 years 7 months ago
Formal Methods for Systems Engineering Behavior Models
Abstract--Safety analysis in Systems Engineering (SE) processes, as usually implemented, rarely relies on formal methods such as model checking since such techniques, however power...
Charlotte Seidner, Olivier H. Roux