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ITC
2003
IEEE
176views Hardware» more  ITC 2003»
15 years 12 months ago
Instruction Based BIST for Board/System Level Test of External Memories and Internconnects
ct This paper describes a general technique to test external memory/caches and memory interconnects using on-chip logic. Such a test methodology is expected to significantly reduc...
Olivier Caty, Ismet Bayraktaroglu, Amitava Majumda...
RAID
1999
Springer
15 years 11 months ago
SNMS - Shadow Network Management System
Putting in more security measures and access controls within an organisation runs contrary to operational e ciency and convenience. Although the balance between security and opera...
Tiang Hwee Ong, Chung Pheng Tan, Yong Tai Tan, Chr...
SUTC
2010
IEEE
15 years 10 months ago
Pushing the Throughput Limit of Low-Complexity Wireless Embedded Sensing Systems
—To maximize the communication throughput for wireless sensing systems, designers have attempted various combinations of protocol design and manual code optimization. Although th...
Vahid Salmani, Pai H. Chou
INTENV
2010
15 years 1 months ago
We all wear dark glasses now
The story describes a world of the future in which there are two entirely different groups of people, one involved in the development and reproduction of the industrial base of the...
Graham Clarke, Malcolm Lear
SWS
2004
ACM
16 years 1 days ago
Trust but verify: authorization for web services
Through web service technology, distributed applications can be built in a exible manner, bringing tremendous power to applications on the web. However, this exibility poses sig...
Christian Skalka, Xiaoyang Sean Wang