Automated code generation and performance tuning techniques for concurrent architectures such as GPUs, Cell and FPGAs can provide integer factor speedups over multi-core processor...
With new sophisticated compiler technology, it is possible to schedule distant instructions efficiently. As a consequence, the amount of exploitable instruction level parallelism...
Anup Gangwar, M. Balakrishnan, Preeti Ranjan Panda...
In this paper, we investigate the benefits of a flexible, application-specific instruction set by adding a run-time Reconfigurable Functional Unit (RFU) to a VLIW processor. Preli...
This paper presents a method to capture human motion from silhouettes of a person in multi-view video streams. Applying a hierarchical kinematic body model motion parameters are e...
Christian Theobalt, Joel Carranza, Marcus A. Magno...
We present SwitchBlade, a platform for rapidly deploying custom protocols on programmable hardware. SwitchBlade uses a pipeline-based design that allows individual hardware module...
Muhammad Bilal Anwer, Murtaza Motiwala, Muhammad M...