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FPL
2007
Springer
105views Hardware» more  FPL 2007»
16 years 2 days ago
Time Predictable CPU and DMA Shared Memory Access
In this paper, we propose a first step towards a time predictable computer architecture for single-chip multiprocessing (CMP). CMP is the actual trend in server and desktop syste...
Christof Pitter, Martin Schoeberl
ITC
1997
IEEE
73views Hardware» more  ITC 1997»
15 years 10 months ago
A Low-Overhead Design for Testability and Test Generation Technique for Core-Based Systems
In a fundamental paradigm shift in system design, entire systems are being built on a single chip, using multiple embedded cores. Though the newest system design methodology has s...
Indradeep Ghosh, Niraj K. Jha, Sujit Dey
RTAS
2003
IEEE
15 years 11 months ago
Kernel Support for Open QoS-Aware Computing
Most research on QoS-aware computing considers systems where code is generally partitioned into separately schedulable tasks with associated timing constraints. In sharp contrast ...
Ronghua Zhang, Tarek F. Abdelzaher, John A. Stanko...
RTCSA
2009
IEEE
16 years 19 days ago
Multi-path Planning for Mobile Element to Prolong the Lifetime of Wireless Sensor Networks
Mobile elements, which can traverse the deployment area and convey the observed data from static sensor nodes to a base station, have been introduced for energy efficient data co...
Dakai Zhu, Yifeng Guo, Ali Saman Tosun
JSA
2000
175views more  JSA 2000»
15 years 5 months ago
Complete worst-case execution time analysis of straight-line hard real-time programs
In this article, the problem of finding a tight estimate on the worst-case execution time (WCET) of a real-time program is addressed. The analysis is focused on straight-line code...
Friedhelm Stappert, Peter Altenbernd