668 search results - page 75 / 134 » Evaluation of Parallel Logic Simulation Using DVSIM |
156
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ICCAD
2002
IEEE
16 years 2 months ago
2002
IEEE
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
151
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ISCA
1994
IEEE
15 years 10 months ago
1994
IEEE
Today's commodity microprocessors require a low latency memory system to achieve high sustained performance. The conventional high-performance memory system provides fast dat...
131
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HPCA
1996
IEEE
15 years 10 months ago
1996
IEEE
The current multiprocessors such asCray T3D support interprocessor communication using partitioned dimension-order routers (PDRs). In a PDR implementation, the routing logic and sw...
148
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CCGRID
2002
IEEE
15 years 11 months ago
2002
IEEE
This paper presents a performance analysis of marketbased batch schedulers for clusters of workstations. In contrast to previous work, we use user-centric performance metrics as t...
137
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DDECS
2007
IEEE
16 years 11 days ago
2007
IEEE
Logic Soft Errors caused by radiation are a major concern when working with circuits that need to operate in harsh environments, such as space or avionics applications, where soft ...