Sciweavers

2717 search results - page 332 / 544
» Evaluation in Context
Sort
View
CSFW
2009
IEEE
16 years 1 months ago
ASPIER: An Automated Framework for Verifying Security Protocol Implementations
Abstract. We present aspier – the first framework that combines software model checking with a standard protocol security model to analyze authentication and secrecy properties ...
Sagar Chaki, Anupam Datta
ISCA
2006
IEEE
142views Hardware» more  ISCA 2006»
16 years 19 days ago
Bulk Disambiguation of Speculative Threads in Multiprocessors
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...
Luis Ceze, James Tuck, Josep Torrellas, Calin Casc...
ISCA
2005
IEEE
118views Hardware» more  ISCA 2005»
16 years 5 days ago
Continuous Optimization
This paper presents a hardware-based dynamic optimizer that continuously optimizes an application’s instruction stream. In continuous optimization, dataflow optimizations are p...
Brian Fahs, Todd M. Rafacz, Sanjay J. Patel, Steve...
MOBICOM
2004
ACM
16 years 21 hour ago
Characterizing flows in large wireless data networks
Several studies have recently been performed on wireless university campus networks, corporate and public networks. Yet little is known about the flow-level characterization in s...
Xiaoqiao Meng, Starsky H. Y. Wong, Yuan Yuan, Song...
210
Voted
ISCA
1995
IEEE
147views Hardware» more  ISCA 1995»
15 years 10 months ago
Dynamic Self-Invalidation: Reducing Coherence Overhead in Shared-Memory Multiprocessors
This paper introduces dynamic self-invalidation (DSI), a new technique for reducing cache coherence overhead in shared-memory multiprocessors. DSI eliminates invalidation messages...
Alvin R. Lebeck, David A. Wood