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CGO
2008
IEEE
16 years 1 months ago
Fast liveness checking for ssa-form programs
Liveness analysis is an important analysis in optimizing compilers. Liveness information is used in several optimizations and is mandatory during the code-generation phase. Two dr...
Benoit Boissinot, Sebastian Hack, Daniel Grund, Be...
ISPASS
2008
IEEE
16 years 1 months ago
Program Phase Detection based on Critical Basic Block Transitions
Many programs go through phases as they execute. Knowing where these phases begin and end can be beneficial. For example, adaptive architectures can exploit such information to lo...
Paruj Ratanaworabhan, Martin Burtscher
ISPASS
2007
IEEE
16 years 1 months ago
PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator
In this paper, we introduce PTLsim, a cycle accurate full system x86-64 microprocessor simulator and virtual machine. PTLsim models a modern superscalar out of order x86-64 proces...
Matt T. Yourst
177
Voted
NCA
2007
IEEE
16 years 29 days ago
Towards IQ-Appliances: Quality-awareness in Information Virtualization
Our research addresses two important problems that arise in modern large-scale distributed systems: (1) the necessity to virtualize their data flows by applying actions such as ï...
Radhika Niranjan, Ada Gavrilovska, Karsten Schwan,...
LCTRTS
2007
Springer
16 years 27 days ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...