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ASPDAC
2000
ACM
95views Hardware» more  ASPDAC 2000»
15 years 11 months ago
Retargetable estimation scheme for DSP architecture selection
— Given the recent wave of innovation and diversification in digital signal processor (DSP) architecture, the need for quickly evaluating the true potential of considered archite...
Naji Ghazal, A. Richard Newton, Jan M. Rabaey
KES
1998
Springer
15 years 10 months ago
Insect vision based motion detection
The architectural and circuit design aspects of a mixed analog/digital very large scale integration (VLSI) motion detection chip based on models of the insect visual system are des...
X. T. Nguyen
ICCD
1993
IEEE
111views Hardware» more  ICCD 1993»
15 years 10 months ago
Ravel-XL: A Hardware Accelerator for Assigned-Delay Compiled-Code Logic Gate Simulation
Ravel-XL is a single-boardhardware accelerator for gate-level digital logic simulation. It uses a standard levelizedcode approach to statically schedule gate evaluations.However, u...
Michael A. Riepe, João P. Marques Silva, Ka...
CANDT
2009
15 years 10 months ago
Empowering rural citizen journalism via web 2.0 technologies
Once acquainted with the modern information and communication tools made available with the advent of the Internet, five Brazilian rural communities participating in a pilot proje...
Marco A. Figueiredo, Paola Prado, Mauro A. Câ...
CBMS
2004
IEEE
15 years 10 months ago
Image Segmentation of Uterine Cervix Images for Indexing in PACS
The National Cancer Institute has collected a large database of digitized 35mm slides of the uterine cervix, the idea being to build a system enabling to study the evolution of le...
Shiri Gordon, Gali Zimmerman, Hayit Greenspan