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ISCA
2009
IEEE
239views Hardware» more  ISCA 2009»
16 years 24 days ago
Scalable high performance main memory system using phase-change memory technology
The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. A...
Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Ju...
ISCA
2009
IEEE
152views Hardware» more  ISCA 2009»
16 years 24 days ago
Scaling the bandwidth wall: challenges in and avenues for CMP scaling
As transistor density continues to grow at an exponential rate in accordance to Moore’s law, the goal for many Chip Multi-Processor (CMP) systems is to scale the number of on-ch...
Brian M. Rogers, Anil Krishna, Gordon B. Bell, Ken...
CPAIOR
2009
Springer
16 years 22 days ago
Optimal Interdiction of Unreactive Markovian Evaders
The interdiction problem arises in a variety of areas including military logistics, infectious disease control, and counter-terrorism. In the typical formulation of network interdi...
Alexander Gutfraind, Aric A. Hagberg, Feng Pan
ISLPED
2009
ACM
168views Hardware» more  ISLPED 2009»
16 years 20 days ago
Low power circuit design based on heterojunction tunneling transistors (HETTs)
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, ...
MOBICOM
2009
ACM
16 years 20 days ago
Scheduling partition for order optimal capacity in large-scale wireless networks
The capacity scaling property specifies the changes in network throughput when network size increases and serves as an essential performance evaluation metric for large-scale wir...
Yi Xu, Wenye Wang