201 search results - page 23 / 41 » Evaluating Run-Time Techniques for Leakage Power Reduction |
181
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CF
2007
ACM
2007
ACM
Adaptive VP decay: making value predictors leakage-efficient designs for high performance processors
15 years 10 months ago
Energy-efficient microprocessor designs are one of the major concerns in both high performance and embedded processor domains. Furthermore, as process technology advances toward d...
140
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ICCD
2004
IEEE
16 years 3 months ago
2004
IEEE
This paper evaluates several hardware-based data prefetching techniques from an energy perspective, and explores their energy/performance tradeoffs. We present detailed simulation...
135
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ISVLSI
2008
IEEE
16 years 14 days ago
2008
IEEE
Powerful branch predictors along with a large branch target buffer (BTB) are employed in superscalar processors for instruction-level parallelism exploitation. However, the large ...
151
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ISCAS
2008
IEEE
16 years 14 days ago
2008
IEEE
— In a nanoscale technology, memory bits are highly susceptible to process variation induced read/write failures. To address the above problem, in this paper a new memory cell is...
151
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PATMOS
2007
Springer
16 years 5 days ago
2007
Springer
The deep submicron semiconductor technologies will make the worst-case design impossible, since they can not provide design margins that it requires. Research directions should go ...