1304 search results - page 217 / 261 » Evaluating Hardware Compilation Techniques |
171
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SIGMETRICS
1993
ACM
15 years 10 months ago
1993
ACM
As disk arrays become widely used, tools for understanding and analyzing their performance become increasingly important. In particular, performance models can be invaluable in bo...
166
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CAV
2010
Springer
15 years 10 months ago
2010
Springer
Abstract. Synthesis of finite state systems from full linear time temporal logic (LTL) specifications is gaining more and more attention as several recent achievements have signi...
145
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ICCD
2007
IEEE
15 years 10 months ago
2007
IEEE
This paper presents a novel power reduction method for chip multi-processors (CMPs) under real-time constraints. While the power consumption of processing units (PUs) on CMPs can ...
149
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ASYNC
2004
IEEE
15 years 10 months ago
2004
IEEE
Register files of microprocessors have often been cited as performance bottlenecks and significant consumers of energy. The robust and modular nature of quasi-delay insensitive (Q...
154
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ECMDAFA
2006
Springer
15 years 9 months ago
2006
Springer
In MDE, model transformations should be efficiently tested so that it may be used and reused safely. Mutation analysis is an efficient technique to evaluate the quality of test dat...