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» Evaluating Hardware Compilation Techniques
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DATE
2006
IEEE
125views Hardware» more  DATE 2006»
16 years 7 days ago
Formal performance analysis and simulation of UML/SysML models for ESL design
UML2 and SysML try to adopt techniques known from software development to systems engineering. However, the focus has been put on modeling aspects until now and quantitative perfo...
Alexander Viehl, Timo Schönwald, Oliver Bring...
DATE
2005
IEEE
158views Hardware» more  DATE 2005»
15 years 11 months ago
Scheduling of Soft Real-Time Systems for Context-Aware Applications
Context-aware applications pose new challenges, including a need for new computational models, uncertainty management, and efficient optimization under uncertainty. Uncertainty c...
Jennifer L. Wong, Weiping Liao, Fei Li, Lei He, Mi...
MICRO
2005
IEEE
125views Hardware» more  MICRO 2005»
15 years 11 months ago
Improving Region Selection in Dynamic Optimization Systems
The performance of a dynamic optimization system depends heavily on the code it selects to optimize. Many current systems follow the design of HP Dynamo and select a single interp...
David Hiniker, Kim M. Hazelwood, Michael D. Smith
IWMM
2004
Springer
101views Hardware» more  IWMM 2004»
15 years 11 months ago
Exploring the barrier to entry: incremental generational garbage collection for Haskell
We document the design and implementation of a “production” incremental garbage collector for GHC 6.2. It builds on our earlier work (Non-stop Haskell) that exploited GHC’s ...
Andrew M. Cheadle, A. J. Field, Simon Marlow, Simo...
ITC
2003
IEEE
118views Hardware» more  ITC 2003»
15 years 11 months ago
Method of reducing contactor effect when testing high-precision ADCs
— Being able to test the intrinsic performance of a device under test (DUT) has always been the main goal of a test engineer. Achieving this goal is becoming increasingly diffic...
Gwenolé Maugard, Carsten Wegener, Tom O'Dwy...