1304 search results - page 190 / 261 » Evaluating Hardware Compilation Techniques |
140
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
— MPSoC is evolving towards processor-pool (PP)-based architectures, which employ hierarchical on-chip network for inter- and intra-PP communication. Since the design space of PP...
138
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
—Dynamic Thermal Management techniques have been widely accepted as a thermal solution for their low cost and simplicity. The techniques have been used to manage the heat dissipa...
160
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DSD
2007
IEEE
16 years 20 days ago
2007
IEEE
— Programmable multiprocessor systems-on-chip are becoming the preferred implementation platform for embedded streaming applications. This enables using more software components,...
200
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ISQED
2006
IEEE
16 years 10 days ago
2006
IEEE
— Negative Bias Temperature Instability (NBTI) has the potential to become one of the main show-stoppers of circuit reliability in nanometer scale devices due to its deleterious ...
179
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ISLPED
2005
ACM
15 years 12 months ago
2005
ACM
Due to difficulties in distributing a single global clock signal over increasingly large chip areas, a globally asynchronous, locally synchronous design is considered a promising ...