1304 search results - page 186 / 261 » Evaluating Hardware Compilation Techniques |
162
click to vote
EMSOFT
2004
Springer
15 years 11 months ago
2004
Springer
Dataflow synchronous languages have attracted considerable interest in domains such as real-time control and hardware design. The potential benefits are promising: Discrete-time...
155
click to vote
DATE
2010
IEEE
15 years 10 months ago
2010
IEEE
Abstract--Detailed diagnostic data is a prerequisite for debugging problems and understanding runtime performance in distributed wireless embedded systems. Severe bandwidth limitat...
188
click to vote
MICRO
1995
IEEE
15 years 10 months ago
1995
IEEE
Instruction Level Parallelism (ILP) speedups of an order-of-magnitude or greater may be possible using the techniques described herein. Traditional speculative code execution is t...
175
click to vote
TVCG
2012
13 years 8 months ago
2012
—This paper describes a fully automated framework to generate realistic head motion, eye gaze, and eyelid motion simultaneously based on live (or recorded) speech input. Its cent...
163
click to vote
ATVA
2007
Springer
15 years 10 months ago
2007
Springer
Abstract. Symbolic Trajectory Evaluation (STE) is a powerful technique for hardware model checking. It is based on a 3-valued symbolic simulation, using 0,1 and X n"), where t...