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» Evaluating Hardware Compilation Techniques
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ICCAD
1994
IEEE
90views Hardware» more  ICCAD 1994»
15 years 10 months ago
Algorithm selection: a quantitative computation-intensive optimization approach
Given a set of specifications for a targeted application, algorithm selection refers to choosing the most suitable algorithm for a given goal, among several functionally equivalen...
Miodrag Potkonjak, Jan M. Rabaey
ECBS
2007
IEEE
145views Hardware» more  ECBS 2007»
15 years 10 months ago
Automatic Verification and Performance Analysis of Time-Constrained SysML Activity Diagrams
We present in this paper a new approach for the automatic verification and performance analysis of SysML activity diagrams. Since timeliness is important in the design and analysi...
Yosr Jarraya, Andrei Soeanu, Mourad Debbabi, Fawzi...
DATE
2004
IEEE
129views Hardware» more  DATE 2004»
15 years 10 months ago
On the Design and Verification Methodology of the Look-Aside Interface
In this paper, we present a technique to design and verify the Look-Aside (LA-1) Interface standard used in network processors. Our design flow includes several refinements starti...
Ali Habibi, Asif Iqbal Ahmed, Otmane Aït Moha...
SIGMETRICS
1995
ACM
116views Hardware» more  SIGMETRICS 1995»
15 years 10 months ago
A Study of Integrated Prefetching and Caching Strategies
Prefetching and caching are e ective techniques for improving the performance of le systems, but they have not been studied in an integrated fashion. This paper proposes four pro...
Pei Cao, Edward W. Felten, Anna R. Karlin, Kai Li
DSD
2008
IEEE
108views Hardware» more  DSD 2008»
15 years 8 months ago
Reducing Leakage through Filter Cache
We evaluate the leakage reduction for both instruction and data cache in presence of drowsy or decay techniques. We discovered that a filter cache, traditionally used for reducing...
Roberto Giorgi, Paolo Bennati