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» Evaluating Hardware Compilation Techniques
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CGO
2009
IEEE
16 years 1 months ago
Scenario Based Optimization: A Framework for Statically Enabling Online Optimizations
Abstract—Online optimization allows the continuous restructuring and adaptation of an executing application using live information about its execution environment. The further ad...
Jason Mars, Robert Hundt
ISLPED
2004
ACM
151views Hardware» more  ISLPED 2004»
15 years 11 months ago
Dynamic voltage and frequency scaling based on workload decomposition
This paper presents a technique called “workload decomposition” in which the CPU workload is decomposed in two parts: on-chip and off-chip. The on-chip workload signifies the ...
Kihwan Choi, Ramakrishna Soma, Massoud Pedram
SIGMETRICS
2006
ACM
123views Hardware» more  SIGMETRICS 2006»
16 years 10 days ago
Exploiting redundancy to conserve energy in storage systems
This paper makes two main contributions. First, it introduces Diverted Accesses, a technique that leverages the redundancy in storage systems to conserve disk energy. Second, it e...
Eduardo Pinheiro, Ricardo Bianchini, Cezary Dubnic...
DAC
2005
ACM
16 years 7 months ago
Power emulation: a new paradigm for power estimation
In this work, we propose a new paradigm called power emulation, which exploits hardware acceleration to drastically speedup power estimation. Power emulation is based on the obser...
Joel Coburn, Srivaths Ravi, Anand Raghunathan
MICRO
2007
IEEE
79views Hardware» more  MICRO 2007»
16 years 20 days ago
Time Interpolation: So Many Metrics, So Few Registers
The performance of computer systems varies over the course of their execution. A system may perform well during some parts of its execution and poorly during others. To understand...
Todd Mytkowicz, Peter F. Sweeney, Matthias Hauswir...