1304 search results - page 152 / 261 » Evaluating Hardware Compilation Techniques |
173
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BDA
2003
15 years 7 months ago
2003
Pervasive computing introduces data management requirements that must be tackled in a growingvariety of lightweight computing devices. Personal folders on chip, networks of sensor...
172
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EXPCS
2007
15 years 10 months ago
2007
The evaluation of new network server architectures is usually performed experimentally using either a simulator or a hardware prototype. Accurate simulation of the hardwaresoftwar...
183
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IWMM
2010
Springer
15 years 11 months ago
2010
Springer
With the availability of chip multiprocessor (CMP) and simultaneous multithreading (SMT) machines, extracting thread level parallelism from a sequential program has become crucial...
222
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SIGMETRICS
1996
ACM
15 years 10 months ago
1996
ACM
This paper describes Embra, a simulator for the processors, caches, and memory systems of uniprocessors and cache-coherent multiprocessors. When running as part of the SimOS simul...
176
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CODES
2006
IEEE
16 years 16 days ago
2006
IEEE
Traditionally, instruction-set simulators (ISS’s) are sequential programs running on individual processors. Besides the advances of simulation techniques, ISS’s have been main...