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» Evaluating Hardware Compilation Techniques
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DSD
2009
IEEE
90views Hardware» more  DSD 2009»
16 years 1 months ago
Instruction Precomputation for Fault Detection
—Fault tolerance (FT) is becoming increasingly important in computing systems. This work proposes and evaluates the instruction precomputation technique to detect hardware faults...
Demid Borodin, Ben H. H. Juurlink, Stefanos Kaxira...
PLDI
2005
ACM
16 years 18 hour ago
Programming by sketching for bit-streaming programs
This paper introduces the concept of programming with sketches, an approach for the rapid development of high-performance applications. This approach allows a programmer to write ...
Armando Solar-Lezama, Rodric M. Rabbah, Rastislav ...
DATE
2008
IEEE
81views Hardware» more  DATE 2008»
16 years 28 days ago
Practical Implementation of a Network Analyzer for Analog BIST Applications
This paper presents a practical implementation of a network analyzer for analog BIST applications. The network analyzer consists of a sinewave generator and a sinewave evaluator b...
Manuel J. Barragan Asian, Diego Vázquez, Ad...
DATE
2003
IEEE
90views Hardware» more  DATE 2003»
15 years 11 months ago
Transistor-Level Static Timing Analysis by Piecewise Quadratic Waveform Matching
While fast timing analysis methods, such as asymptotic waveform evaluation (AWE), have been well established for linear circuits, the timing analysis for non-linear circuits, whic...
Zhong Wang, Jianwen Zhu
ASAP
2004
IEEE
171views Hardware» more  ASAP 2004»
15 years 10 months ago
CHARMED: A Multi-Objective Co-Synthesis Framework for Multi-Mode Embedded Systems
In this paper, we present a modular co-synthesis framework called CHARMED that solves the problem of hardware-software co-synthesis of periodic, multi-mode, distributed, embedded ...
Vida Kianzad, Shuvra S. Bhattacharyya