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» Evaluating Hardware Compilation Techniques
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ASPLOS
2011
ACM
14 years 10 months ago
RCDC: a relaxed consistency deterministic computer
Providing deterministic execution significantly simplifies the debugging, testing, replication, and deployment of multithreaded programs. Recent work has developed deterministic...
Joseph Devietti, Jacob Nelson, Tom Bergan, Luis Ce...
DATE
2006
IEEE
143views Hardware» more  DATE 2006»
16 years 15 days ago
A coverage metric for the validation of interacting processes
We present a coverage metric which evaluates the testing of a set of interacting concurrent processes. Existing behavioral coverage metrics focus almost exclusively on the testing...
Ian G. Harris
IWMM
2010
Springer
157views Hardware» more  IWMM 2010»
15 years 11 months ago
Tracing garbage collection on highly parallel platforms
The pervasiveness of multiprocessor and multicore hardware and the rising level of available parallelism are radically changing the computing landscape. Can software deal with tom...
Katherine Barabash, Erez Petrank
IEEEPACT
2007
IEEE
16 years 22 days ago
The OpenTM Transactional Application Programming Interface
Transactional Memory (TM) simplifies parallel programming by supporting atomic and isolated execution of user-identified tasks. To date, TM programming has required the use of l...
Woongki Baek, Chi Cao Minh, Martin Trautmann, Chri...
EMSOFT
2006
Springer
15 years 10 months ago
Compiler-assisted leakage energy optimization for clustered VLIW architectures
Miniaturization of devices and the ensuing decrease in the threshold voltage has led to a substantial increase in the leakage component of the total processor energy consumption. ...
Rahul Nagpal, Y. N. Srikant