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ICCD
2001
IEEE
110views Hardware» more  ICCD 2001»
16 years 3 months ago
Low-Energy DSP Code Generation Using a Genetic Algorithm
This paper deals with low-energy code generation for a highly optimized digital signal processor designed for mobile communication applications. We present a genetic algorithm bas...
Markus Lorenz, Rainer Leupers, Peter Marwedel, Tho...
ICCD
2001
IEEE
124views Hardware» more  ICCD 2001»
16 years 3 months ago
High-Level Power Modeling of CPLDs and FPGAs
In this paper, we present a high-level power modeling technique to estimate the power consumption of reconfigurable devices such as complex programmable logic devices (CPLDs) and ...
Li Shang, Niraj K. Jha
ICCAD
2004
IEEE
114views Hardware» more  ICCAD 2004»
16 years 3 months ago
Simultaneous short-path and long-path timing optimization for FPGAs
This paper presents the Routing Cost Valleys (RCV) algorithm – the first published algorithm that simultaneously optimizes all short- and long-path timing constraints in a Field...
Ryan Fung, Vaughn Betz, William Chow
IUI
2010
ACM
16 years 3 months ago
Aspect-level news browsing: understanding news events from multiple viewpoints
Aspect-level news browsing provides readers with a classified view of news articles with different viewpoints. It facilitates active interactions with which readers easily discove...
Souneil Park, Sang Jeong Lee, Junehwa Song
CVPR
2010
IEEE
16 years 2 months ago
Face Recognition with Learning-based Descriptor
We present a novel approach to address the representation issue and the matching issue in face recognition (verification). Firstly, our approach encodes the micro-structures of t...
Zhimin Cao, Qi Yin, Jian Sun, Xiaoou Tang