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ISCA
2011
IEEE
287views Hardware» more  ISCA 2011»
14 years 10 months ago
Scalable power control for many-core architectures running multi-threaded applications
Optimizing the performance of a multi-core microprocessor within a power budget has recently received a lot of attention. However, most existing solutions are centralized and cann...
Kai Ma, Xue Li, Ming Chen, Xiaorui Wang
VTS
1996
IEEE
111views Hardware» more  VTS 1996»
15 years 10 months ago
Synthesis-for-scan and scan chain ordering
Designing a testable circuit is often a two step process. First, the circuit is designed to conform to the functional specifications. Then, the testability aspects are added. By t...
Robert B. Norwood, Edward J. McCluskey
ACMACE
2009
ACM
15 years 10 months ago
Interactive fitness game for public places
We present a concept of a fitness game that can be installed in public places and encourage passers-by to participate in a short play. The game is controlled by players' body...
Ekaterina Kurdyukova, Matthias Rehm
ARC
2006
Springer
85views Hardware» more  ARC 2006»
15 years 10 months ago
Time-Memory Trade-Off Attack on FPGA Platforms: UNIX Password Cracking
Abstract. This paper presents a hardware architecture for UNIX password cracking using Hellman's time-memory trade-off; it is the first hardware design for a key search machin...
Nele Mentens, Lejla Batina, Bart Preneel, Ingrid V...
AVBPA
2001
Springer
116views Biometrics» more  AVBPA 2001»
15 years 10 months ago
Face Identification and Verification via ECOC
We propose a novel approach to face identification and verification based on the Error Correcting Output Coding (ECOC) classifier design concept. In the training phase the client s...
Josef Kittler, Reza Ghaderi, Terry Windeatt, Jiri ...