This paper introduces a real rational module framework in the context of Prediction Error Identification using Box-Jenkins model structures. This module framework, which can easily...
Tzvetan Ivanov, Pierre-Antoine Absil, Brian D. O. ...
Researchers have proposed using hardware data compression units within the memory hierarchies of microprocessors in order to improve performance, energy efficiency, and functional...
Xi Chen, Lei Yang, Haris Lekatsas, Robert P. Dick,...
The currently accepted method of accelerating applications in FPGA soft processor systems is to design a custom hardware accelerator. This paper suggests the alternative approach ...
This paper presents a parallel hardware implementation of a well-known navigation control method on reconfigurable digital circuits. Trajectories are estimated after an iterated ...
This paper presents an adaptive visualization for helping the needle insertion task for RF liver ablation under CT-fluoroscopy (CTfluoro) guidance. It shows slices of the 3D CT-vol...
Ruxandra Lasowski, Selim Benhimane, Jakob Vogel, T...