Sorting is a memory intensive operation whose performance is greatly affected by the amount of memory available as work space. When the input size is unknown or available memory s...
We detail and analyse the critical techniques which may be combined in the design of fast hardware for RSA cryptography: chinese remainders, star chains, Hensel's odd divisio...
We have proposed an e cient measure to reduce the clock skew by assigning the clock network with variable branch widths. This measure has long been used for \H" clock tree. T...
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
In current research, the minimum cycle times of finite state machines are estimated by computing the delays of the combinational logic in the finite state machines. Even though th...
William K. C. Lam, Robert K. Brayton, Alberto L. S...