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DAC
2006
ACM
16 years 7 months ago
Simultaneous time slack budgeting and retiming for dual-Vdd FPGA power reduction
Field programmable dual-Vdd interconnects are effective to reduce FPGA power. Assuming uniform length interconnects, existing work has developed time slack budgeting to minimize p...
Yu Hu, Yan Lin, Lei He, Tim Tuan
BMCBI
2007
215views more  BMCBI 2007»
15 years 6 months ago
Learning causal networks from systems biology time course data: an effective model selection procedure for the vector autoregres
Background: Causal networks based on the vector autoregressive (VAR) process are a promising statistical tool for modeling regulatory interactions in a cell. However, learning the...
Rainer Opgen-Rhein, Korbinian Strimmer
VLDB
1987
ACM
78views Database» more  VLDB 1987»
15 years 10 months ago
Measured Performance of Time Interval Concurrency Control Techniques
This paper reports on an implementation of Bayer's Time Interval concurrency control method and compares it to the performance of a conventional timestamp method. The impleme...
Jerre D. Noe, David B. Wagner
ISORC
2009
IEEE
16 years 1 months ago
Adding Timing-Awareness to AUTOSAR Basic-Software -- A Component Based Approach
AUTOSAR as specified in its current version fosters timing-constraints at application level to support the development of real-time automotive applications. However, the standard...
Dietmar Schreiner, Markus Schordan, Jens Knoop
DATE
1999
IEEE
172views Hardware» more  DATE 1999»
15 years 10 months ago
An Object-Based Executable Model for Simulation of Real-Time Hw/Sw Systems
This paper describes a simulation technique for RealTime Hw/Sw systems based on an object executable model. It allows designers to seamlessly estimate and verify their solutions f...
Olivier Pasquier, Jean Paul Calvez