313 search results - page 21 / 63 » Error Correction Based on Verification Techniques |
160
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ASE
2004
15 years 5 months ago
2004
The verification of concurrent systems through an exhaustive traversal of the state space suffers from the infamous state-space-explosion problem, caused by the many interleavings ...
148
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SIGGRAPH
1999
ACM
15 years 10 months ago
1999
ACM
We introduce a new concept for accelerating realistic image synthesis algorithms. At the core of this procedure is a novel physical error metric that correctly predicts the percep...
149
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DFT
2003
IEEE
15 years 11 months ago
2003
IEEE
We describe a method for designing fault tolerant circuits based on an extension of a Concurrent Error Detection (CED) technique. The proposed extension combines parity check code...
182
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FMICS
2006
Springer
15 years 9 months ago
2006
Springer
Abstract. Bounded model checking (BMC) based on satisfiability testing (SAT) has been introduced as a complementary technique to BDDbased symbolic model checking of LTL properties ...
149
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APPROX
2009
Springer
16 years 18 days ago
2009
Springer
The area of derandomization attempts to provide efficient deterministic simulations of randomized algorithms in various algorithmic settings. Goldreich and Wigderson introduced a n...