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ISCA
2007
IEEE
110views Hardware» more  ISCA 2007»
16 years 26 days ago
A novel dimensionally-decomposed router for on-chip communication in 3D architectures
Much like multi-storey buildings in densely packed metropolises, three-dimensional (3D) chip structures are envisioned as a viable solution to skyrocketing transistor densities an...
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Par...
IWOMP
2007
Springer
16 years 21 days ago
Supporting OpenMP on Cell
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
Kevin O'Brien, Kathryn M. O'Brien, Zehra Sura, Ton...
COMPGEOM
2010
ACM
15 years 11 months ago
Orthogonal range reporting: query lower bounds, optimal structures in 3-d, and higher-dimensional improvements
Orthogonal range reporting is the problem of storing a set of n points in d-dimensional space, such that the k points in an axis-orthogonal query box can be reported efficiently. ...
Peyman Afshani, Lars Arge, Kasper Dalgaard Larsen
FCCM
1998
IEEE
107views VLSI» more  FCCM 1998»
15 years 10 months ago
Frequency-Domain Sonar Processing in FPGAs and DSPs
Over the past year we have been exploring the use of FPGA-based custom computing machines for several sonar beamforming applications, including time-domain beamforming[1], frequen...
Paul Graham, Brent E. Nelson
VISUALIZATION
1998
IEEE
15 years 10 months ago
Building perceptual textures to visualize multidimensional datasets
This paper presents a new method for using texture to visualize multidimensional data elements arranged on an underlying threedimensional height field. We hope to use simple textu...
Christopher G. Healey, James T. Enns