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DAC
2007
ACM
15 years 10 months ago
Memory Modeling in ESL-RTL Equivalence Checking
When designers create RTL models from a system-level specification, arrays in the system-level model are often implemented as memories in the RTL. Knowing the correspondence betwe...
Alfred Kölbl, Jerry R. Burch, Carl Pixley
DAC
2010
ACM
15 years 10 months ago
Representative path selection for post-silicon timing prediction under variability
The identification of speedpaths is required for post-silicon (PS) timing validation, and it is currently becoming timeconsuming due to manufacturing variations. In this paper we...
Lin Xie, Azadeh Davoodi
ANTSW
2006
Springer
15 years 10 months ago
An Analysis of the Different Components of the AntHocNet Routing Algorithm
Abstract. Mobile ad hoc networks are a class of highly dynamic networks. In previous work, we developed a new routing algorithm, called AntHocNet, for these challenging network env...
Frederick Ducatelle, Gianni Di Caro, Luca Maria Ga...
DEXAW
2004
IEEE
167views Database» more  DEXAW 2004»
15 years 10 months ago
BioMap: Gene Family based Integration of Heterogeneous Biological Databases Using AutoMed Metadata
This paper presents an extensible architecture that can be used to support the integration of biological data sets. Biological research frequently requires this kind of synthesis....
Michael Maibaum, Galia Rimon, Christine A. Orengo,...
DFT
2004
IEEE
134views VLSI» more  DFT 2004»
15 years 10 months ago
On the Defect Tolerance of Nano-Scale Two-Dimensional Crossbars
Defect tolerance is an extremely important aspect in nano-scale electronics as the bottom-up selfassembly fabrication process results in a significantly higher defect density comp...
Jing Huang, Mehdi Baradaran Tahoori, Fabrizio Lomb...