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ISCAS
2008
IEEE
123views Hardware» more  ISCAS 2008»
16 years 1 months ago
A 5.2mW all-digital fast-lock self-calibrated multiphase delay-locked loop
—A 333MHz-1GHz all-digital multiphase delay-locked loop with precise multi-phase output has been designed with TSMC 130nm CMOS technology model. A modified binary search algorith...
Li-Pu Chuang, Ming-Hung Chang, Po-Tsang Huang, Chi...
CEC
2007
IEEE
16 years 1 months ago
A study on the design issues of Memetic Algorithm
— Over the recent years, there has been increasing research activities made on improving the efficacy of Memetic Algorithm (MA) for solving complex optimization problems. Partic...
Q. H. Nguyen, Yew-Soon Ong, Natalio Krasnogor
ETS
2007
IEEE
94views Hardware» more  ETS 2007»
16 years 1 months ago
An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy
An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. Therefore embedded memories are commonly equipped with spare r...
Philipp Öhler, Sybille Hellebrand, Hans-Joach...
HICSS
2005
IEEE
99views Biometrics» more  HICSS 2005»
16 years 15 days ago
The Meaning of Arrows: Diagrams and Other Facets in System Sciences Literature
Understanding the use of diagrams and other components of scholarly systems-related papers may inform us about the papers, the field, and the way we think. We analyze 495 papers c...
Jeffrey V. Nickerson
GCC
2004
Springer
16 years 8 days ago
Distributed MD4 Password Hashing with Grid Computing Package BOINC
Distributed computing on heterogeneous nodes, or grid computing, provides a substantial increase in computational power available for many applications. This paper reports our expe...
Stephen Pellicer, Yi Pan, Minyi Guo