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PACS
2004
Springer
115views Hardware» more  PACS 2004»
15 years 12 months ago
Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization
Dynamic instruction scheduling logic is one of the most critical components of modern superscalar microprocessors, both from the delay and power dissipation standpoints. The delay ...
Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose, ...
ICPPW
2007
IEEE
16 years 24 days ago
Power Management of Multicore Multiple Voltage Embedded Systems by Task Scheduling
We study the role of task-level scheduling in power management on multicore multiple voltage embedded systems. Multicore on-achip, in particular DSP systems, can greatly improve p...
Gang Qu
SMC
2010
IEEE
228views Control Systems» more  SMC 2010»
15 years 4 months ago
A safe communication scheme for an intelligent Wireless Networked Control System Coordination Agent
Abstract— Wireless networked control systems have begun to gain acceptance during the last decade, largely due to the increased flexibility and lower costs they promise to provi...
James H. Taylor, Hazem M. S. Ibrahim, Jeff Slipp, ...
LCTRTS
2010
Springer
15 years 8 months ago
An efficient code update scheme for DSP applications in mobile embedded systems
DSP processors usually provide dedicated address generation units (AGUs) to assist address computation. By carefully allocating variables in the memory, DSP compilers take advanta...
Weijia Li, Youtao Zhang
EMSOFT
2004
Springer
15 years 12 months ago
Using resource reservation techniques for power-aware scheduling
Minimizing energy consumption is an important issue in the design of real-time embedded systems. As many embedded systems are powered by rechargeable batteries, the goal is to ext...
Claudio Scordino, Giuseppe Lipari