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ISSRE
2005
IEEE
16 years 5 hour ago
PORT: A Price-Oriented Reliable Transport Protocol for Wireless Sensor Networks
In wireless sensor networks, to obtain reliability and minimize energy consumption, a dynamic rate-control and congestion-avoidance transport scheme is very important. We notice t...
Yangfan Zhou, Michael R. Lyu
LCPC
2005
Springer
15 years 12 months ago
Compiler Control Power Saving Scheme for Multi Core Processors
With the increase of transistors integrated onto a chip, multi core processor architectures have attracted much attention to achieve high effective performance, shorten developmen...
Jun Shirako, Naoto Oshiyama, Yasutaka Wada, Hiroak...
VLSI
2005
Springer
15 years 12 months ago
Modeling the Traffic Effect for the Application Cores Mapping Problem onto NoCs
This work addresses the problem of application mapping in networks-on-chip (NoCs) having as goal to minimize the total dynamic energy consumption of a complex system-on-a-chip (So...
César A. M. Marcon, José Carlos S. P...
CASES
2004
ACM
15 years 12 months ago
A low power architecture for embedded perception
Recognizing speech, gestures, and visual features are important interface capabilities for future embedded mobile systems. Unfortunately, the real-time performance requirements of...
Binu K. Mathew, Al Davis, Michael Parker
MICRO
2003
IEEE
106views Hardware» more  MICRO 2003»
15 years 11 months ago
Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction
This paper proposes and evaluates single-ISA heterogeneous multi-core architectures as a mechanism to reduce processor power dissipation. Our design incorporates heterogeneous cor...
Rakesh Kumar, Keith I. Farkas, Norman P. Jouppi, P...