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CGO
2008
IEEE
16 years 14 days ago
Parallel-stage decoupled software pipelining
In recent years, the microprocessor industry has embraced chip multiprocessors (CMPs), also known as multi-core architectures, as the dominant design paradigm. For existing and ne...
Easwaran Raman, Guilherme Ottoni, Arun Raman, Matt...
DSRT
2008
IEEE
16 years 14 days ago
Interfacing and Coordination for a DEVS Simulation Protocol Standard
The DEVS formalism has been adopted and developed independently by many research teams, which led to various DEVS implementation versions. Consequently, different DEVS implementat...
Khaldoon Al-Zoubi, Gabriel A. Wainer
INFOCOM
2008
IEEE
16 years 12 days ago
Firewall Compressor: An Algorithm for Minimizing Firewall Policies
—A firewall is a security guard placed between a private network and the outside Internet that monitors all incoming and outgoing packets. The function of a firewall is to exam...
Alex X. Liu, Eric Torng, Chad R. Meiners
MICRO
2008
IEEE
107views Hardware» more  MICRO 2008»
16 years 12 days ago
A distributed processor state management architecture for large-window processors
— Processor architectures with large instruction windows have been proposed to expose more instruction-level parallelism (ILP) and increase performance. Some of the proposed arch...
Isidro Gonzalez, Marco Galluzzi, Alexander V. Veid...
CGO
2007
IEEE
16 years 10 days ago
Ubiquitous Memory Introspection
Modern memory systems play a critical role in the performance of applications, but a detailed understanding of the application behavior in the memory system is not trivial to atta...
Qin Zhao, Rodric M. Rabbah, Saman P. Amarasinghe, ...