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» Employing Simulation to Evaluate Designs: The APEX Approach
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FDL
2006
IEEE
16 years 13 days ago
Layered UML Workload and SystemC Platform Models
Future mobile devices will be based on heterogeneous multiprocessing platforms accommodating several currently stand-alone applications. Increasing complexity of both application ...
Jari Kreku, Yang Qu, Juha-Pekka Soininen, Kari Tie...
ICCAD
1997
IEEE
137views Hardware» more  ICCAD 1997»
15 years 10 months ago
Optimization techniques for high-performance digital circuits
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
Chandramouli Visweswariah
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
15 years 4 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
MICCAI
2009
Springer
15 years 11 months ago
Bayesian Maximal Paths for Coronary Artery Segmentation from 3D CT Angiograms
We propose a recursive Bayesian model for the delineation of coronary arteries from 3D CT angiograms (cardiac CTA) and discuss the use of discrete minimal path techniques as an eï¬...
David Lesage, Elsa D. Angelini, Isabelle Bloch, Ga...
DFT
1997
IEEE
93views VLSI» more  DFT 1997»
15 years 10 months ago
An IDDQ Sensor for Concurrent Timing Error Detection
Abstract— Error control is a major concern in many computer systems, particularly those deployed in critical applications. Experience shows that most malfunctions during system o...
Christopher G. Knight, Adit D. Singh, Victor P. Ne...