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ISCAS
2007
IEEE
104views Hardware» more  ISCAS 2007»
16 years 1 months ago
Reduction of Register File Delay Due to Process Variability in VLIW Embedded Processors
Process variation in future technologies can cause severe performance degradation since different parts of the shared Register File (RF) in VLIW processors may operate at various ...
Praveen Raghavan, José L. Ayala, David Atie...
ERLANG
2004
ACM
16 years 7 days ago
Structured programming using processes
Structured Programming techniques are applied to a personal accounting software application implemented in erlang as a demonstration of the utility of processes as design construc...
Jay Nelson
ISLPED
2009
ACM
154views Hardware» more  ISLPED 2009»
15 years 11 months ago
Experimental analysis of sequence dependence on energy saving for error tolerant image processing
We present experimental analysis to exploit the sequence dependence on energy saving in error tolerant image processing. Our analysis shows that the error distributions depend not...
Se Hun Kim, Saibal Mukhopadhyay, Wayne Wolf
CF
2007
ACM
15 years 10 months ago
Massively parallel processing on a chip
MppSoC is a SIMD architecture composed of a grid of processors and memories connected by a X-Net neighbourhood network and a general purpose global router. MppSoC is an evolution ...
Philippe Marquet, Simon Duquennoy, Sébastie...
ML
2000
ACM
244views Machine Learning» more  ML 2000»
15 years 6 months ago
Learnable Evolution Model: Evolutionary Processes Guided by Machine Learning
A new class of evolutionary computation processes is presented, called Learnable Evolution Model or LEM. In contrast to Darwinian-type evolution that relies on mutation, recombinat...
Ryszard S. Michalski