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ICIP
2007
IEEE
16 years 8 months ago
Estimating Steganographic Capacity for Odd-Even Based Embedding and its Use in Individual Compensation
We present a method to compute the steganographic capacity for images, with odd-even based hiding in the quantized discrete cosine transform domain. The method has been generalize...
Anindya Sarkar, B. S. Manjunath
ICIP
1999
IEEE
16 years 8 months ago
Architecture of Embedded Video Processing in a Multimedia Chip-Set
A new chip-set for video display processing in a consumer television or set-top box is presented. Key aspect of the chip-set is a high flexibility and programmability of multi-win...
Egbert G. T. Jaspers, Peter H. N. de With
VLSID
2005
IEEE
102views VLSI» more  VLSID 2005»
16 years 7 months ago
Rapid Embedded Hardware/Software System Generation
This paper presents an RTL generation scheme for a SimpleScalar / PISA Instruction set architecture with system calls to implement C programs. The scheme utilizes ASIPmeister, a p...
Jorgen Peddersen, Seng Lin Shee, Andhi Janapsatya,...
DATE
2009
IEEE
135views Hardware» more  DATE 2009»
16 years 1 months ago
Heterogeneous coarse-grained processing elements: A template architecture for embedded processing acceleration
Reconfigurable Architectures are good candidates for application accelerators that cannot be set in stone at production time. FPGAs however, often suffer from the area and perfor...
Giovanni Ansaloni, Paolo Bonzini, Laura Pozzi
ISCAS
2007
IEEE
123views Hardware» more  ISCAS 2007»
16 years 1 months ago
Evaluating Network-on-Chip for Homogeneous Embedded Multiprocessors in FPGAs
— This paper presents performance and area evaluation of a homogeneous multiprocessor communication system based on network-on-chip (NoC) in FPGA platforms. Two homogenous chip m...
Henrique C. Freitas, Dalton M. Colombo, Fernanda L...