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ISSS
2002
IEEE
154views Hardware» more  ISSS 2002»
15 years 11 months ago
Optimal Code Size Reduction for Software-Pipelined and Unfolded Loops
Software pipelining and unfolding are commonly used techniques to increase parallelism for DSP applications. However, these techniques expand the code size of the application sign...
Bin Xiao, Zili Shao, Chantana Chantrapornchai, Edw...
SAMOS
2009
Springer
15 years 11 months ago
CABAC Accelerator Architectures for Video Compression in Future Multimedia: A Survey
The demands for high quality, real-time performance and multi-format video support in consumer multimedia products are ever increasing. In particular, the future multimedia systems...
Yahya Jan, Lech Józwiak
CASES
2007
ACM
15 years 10 months ago
Non-transparent debugging for software-pipelined loops
This paper tackles the problem of providing correct information about program variable values in a software-pipelined loop through a non-transparent debugging approach. Since mode...
Hugo Venturini, Frédéric Riss, Jean-...
ICCD
2007
IEEE
152views Hardware» more  ICCD 2007»
15 years 10 months ago
Compiler-assisted architectural support for program code integrity monitoring in application-specific instruction set processors
As application-specific instruction set processors (ASIPs) are being increasingly used in mobile embedded systems, the ubiquitous networking connections have exposed these systems...
Hai Lin, Xuan Guan, Yunsi Fei, Zhijie Jerry Shi
EH
2004
IEEE
117views Hardware» more  EH 2004»
15 years 10 months ago
Multi-objective Optimization of a Parameterized VLIW Architecture
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...