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2003
IEEE
15 years 12 months ago
Timing Analysis of Optimised Code
Timing analysis is a crucial test for dependable hard real-time systems (DHRTS). The calculation of the worst-case execution time (WCET) is mandatory. As modern compilers are capa...
Raimund Kirner, Peter P. Puschner
CC
2003
Springer
192views System Software» more  CC 2003»
15 years 12 months ago
Address Register Assignment for Reducing Code Size
Abstract. In DSP processors, minimizing the amount of address calculations is critical for reducing code size and improving performance since studies of programs have shown that in...
Mahmut T. Kandemir, Mary Jane Irwin, Guilin Chen, ...
ISCAS
1999
IEEE
113views Hardware» more  ISCAS 1999»
15 years 11 months ago
Energy efficient software through dynamic voltage scheduling
The energy usage of computer systems is becoming important, especially for portablebattery-operated applications and embedded systems. A significant reduction in the energy consum...
Gangadhar Konduri, James Goodman, Anantha Chandrak...
CONCUR
1999
Springer
15 years 11 months ago
Statecharts Via Process Algebra
Statecharts is a visual language for specifying the behavior of reactive systems. The language extends nite-state machines with concepts of hierarchy, concurrency, and priority. De...
Gerald Lüttgen, Michael von der Beeck, Rance ...
152
Voted
ISSS
1999
IEEE
109views Hardware» more  ISSS 1999»
15 years 11 months ago
Loop Alignment for Memory Accesses Optimization
Portable or embedded systems allow more and more complex applications like multimedia today. These applications and submicronic technologies have made the power consumption criter...
Antoine Fraboulet, Guillaume Huard, Anne Mignotte