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ISSS
1996
IEEE
125views Hardware» more  ISSS 1996»
15 years 11 months ago
Size-Constrained Code Placement for Cache Miss Rate Reduction
In design of an embedded system with a cache, it is important to minimize the cache miss rate to reduce the power consumption as well as to improvethe performance of the system. W...
Hiroyuki Tomiyama, Hiroto Yasuura
CODES
2004
IEEE
15 years 10 months ago
Power-aware communication optimization for networks-on-chips with voltage scalable links
Networks-on-Chip (NoC) is emerging as a practical development platform for future systems-on-chip products. We propose an energyefficient static algorithm which optimizes the ener...
Dongkun Shin, Jihong Kim
ANCS
2008
ACM
15 years 8 months ago
Design of a scalable network programming framework
Nearly all programmable commercial hardware solutions offered for high-speed networking systems are capable of meeting the performance and flexibility requirements of equipment ve...
Ben Wun, Patrick Crowley, Arun Raghunath
ERSA
2006
124views Hardware» more  ERSA 2006»
15 years 8 months ago
RTOS-Based Hardware Software Communications and Configuration Management in the Context of a Smart Camera
This paper deals with the question of task communication and configuration dynamic management in the context of hardware and software implementations. Our approach is based on a c...
Yvan Eustache, Jean-Philippe Diguet, Milad El Khod...
AAAI
2000
15 years 8 months ago
Anchoring Symbols to Sensor Data: Preliminary Report
Anchoring is the process of creating and maintaining the correspondence between symbols and percepts that refer to the same physical objects. Although this process must necessaril...
Silvia Coradeschi, Alessandro Saffiotti