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RTAS
2005
IEEE
16 years 13 days ago
Timing Analysis for Sensor Network Nodes of the Atmega Processor Family
Low-end embedded architectures, such as sensor nodes, have become popular in diverse fields, many of which impose real-time constraints. Currently, the Atmel Atmega processor fam...
Sibin Mohan, Frank Mueller, David B. Whalley, Chri...
188
Voted
HICSS
2003
IEEE
109views Biometrics» more  HICSS 2003»
16 years 4 days ago
Towards a Structurational Theory of Information Systems: A Substantive Case Analysis
This paper employs the analysis of an interpretive case study within a Regional Train Operating Company (RTOC) to arrive at theoretical understandings of Information Systems (IS)....
Jeremy Rose, Ray Hackney
IJACTAICIT
2010
153views more  IJACTAICIT 2010»
15 years 1 months ago
Prediction Using Recurrent Neural Network Based Fuzzy Inference system by the Modified Bees Algorithm
In this paper, a recurrent neural network based fuzzy inference system (RNFIS) for prediction is proposed. A recurrent network is embedded in the RNFIS by adding feedback connecti...
Zahra Khanmirzaei, Mohammad Teshnehlab
INFOCOM
2008
IEEE
16 years 1 months ago
iLOC: An invisible LOCalization Attack to Internet Threat Monitoring Systems
—In this paper, we study a new class of attacks, the invisible LOCalization (iLOC) attack, which can accurately and invisibly localize monitors of Internet threat monitoring (ITM...
Xun Wang, Wei Yu, Xinwen Fu, Dong Xuan, Wei Zhao
DATE
2004
IEEE
154views Hardware» more  DATE 2004»
15 years 10 months ago
MultiNoC: A Multiprocessing System Enabled by a Network on Chip
The MultiNoC system implements a programmable onchip multiprocessing platform built on top of an efficient, low area overhead intra-chip interconnection scheme. The employed inter...
Aline Mello, Leandro Möller, Ney Calazans, Fe...