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174
Voted
DATE
2003
IEEE
102views Hardware» more  DATE 2003»
16 years 5 days ago
Power Constrained High-Level Synthesis of Battery Powered Digital Systems
We present a high-level synthesis algorithm solving the combined scheduling, allocation and binding problem minimizing area under both latency and maximum power per clock-cycle co...
S. F. Nielsen, Jan Madsen
ISCAS
2003
IEEE
96views Hardware» more  ISCAS 2003»
16 years 4 days ago
Interface design approach for system on chip based on configuration
Communication synthesis is an essential step in hardware/software co-synthesis: many embedded systems use automatic generation of interface for point to point communication or use...
Issam Maalej, Guy Gogniat, Mohamed Abid, Jean Luc ...
183
Voted
DATE
2010
IEEE
107views Hardware» more  DATE 2010»
15 years 12 months ago
Worst case delay analysis for memory interference in multicore systems
Abstract—Employing COTS components in real-time embedded systems leads to timing challenges. When multiple CPU cores and DMA peripherals run simultaneously, contention for access...
Rodolfo Pellizzoni, Andreas Schranzhofer, Jian-Jia...
175
Voted
DATE
2000
IEEE
101views Hardware» more  DATE 2000»
15 years 11 months ago
Memory Arbitration and Cache Management in Stream-Based Systems
With the ongoing advancements in VLSI technology, the performance of an embedded system is determined to a large extend by the communication of data and instructions. This results...
Françoise Harmsze, Adwin H. Timmer, Jef L. ...
ICPPW
2000
IEEE
15 years 11 months ago
Flits: Pervasive Computing for Processor and Memory Constrained Systems
Many pervasive computing software technologies are targeted for 32-bit desktop platforms. However, there are innumerable 8, 16, and 32-bit microcontroller and microprocessor-based...
William Majurski, Alden Dima, Mary Laamanen