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DATE
2010
IEEE
142views Hardware» more  DATE 2010»
16 years 15 days ago
A modeling method by eliminating execution traces for performance evaluation
—This paper describes a system-level modeling method in UML for performance evaluation of embedded systems. The core technology of this modeling method is reverse modeling based ...
Kouichi Ono, Manabu Toyota, Ryo Kawahara, Yoshifum...
ISSS
1998
IEEE
87views Hardware» more  ISSS 1998»
15 years 11 months ago
Instruction Encoding Techniques for Area Minimization of Instruction ROM
In this paper, we propose instruction encoding techniques for embedded system design, which encode immediate fields of instructions to reduce the size of an instruction memory. Al...
Takanori Okuma, Hiroyuki Tomiyama, Akihiko Inoue, ...
PDPTA
1997
15 years 8 months ago
MPI/RT: Design and Implementation of a Real-Time Message Passing Interface
This article describes the ongoing work of real-time message passing interface MPI standardization. Real-time MPI MPI RT provides a consistent set of extensions and, in some ca...
Zhenqian Cui, Arkady Kanevsky, Jin Li, Anthony Skj...
ENTCS
2006
141views more  ENTCS 2006»
15 years 7 months ago
A Concurrent Model for Linear Logic
We build a realizability model for linear logic using a name-passing process calculus. The construction is based on testing semantics for processes, drawing ideas from spatial and...
Emmanuel Beffara
DATE
2009
IEEE
249views Hardware» more  DATE 2009»
16 years 2 months ago
White box performance analysis considering static non-preemptive software scheduling
—In this paper, a novel approach for integrating static non-preemptive software scheduling in formal bottom-up performance evaluation of embedded system models is described. The ...
Alexander Viehl, Michael Pressler, Oliver Bringman...