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CODES
2004
IEEE
15 years 10 months ago
Benchmark-based design strategies for single chip heterogeneous multiprocessors
Single chip heterogeneous multiprocessors are arising to meet the computational demands of portable and handheld devices. These computing systems are not fully custom designs trad...
JoAnn M. Paul, Donald E. Thomas, Alex Bobrek
EH
2004
IEEE
117views Hardware» more  EH 2004»
15 years 10 months ago
Multi-objective Optimization of a Parameterized VLIW Architecture
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
DIS
2006
Springer
15 years 10 months ago
Scientific Discovery: A View from the Trenches
One of the primary goals in discovery science is to understand the human scientific reasoning processes. Despite sporadic success of automated discovery systems, few studies have s...
Catherine Blake, Meredith Rendall
EMSOFT
2006
Springer
15 years 10 months ago
Polychronous mode automata
Among related synchronous programming principles, the model of computation of the Polychrony workbench stands out by its capability to give high-level description of systems where...
Jean-Pierre Talpin, Christian Brunette, Thierry Ga...
CASES
2001
ACM
15 years 10 months ago
Patchable instruction ROM architecture
Increased systems level integration has meant the movement of many traditionally off chip components onto a single chip including a processor, instruction storage, data path, and ...
Timothy Sherwood, Brad Calder
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