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TACAS
1998
Springer
131views Algorithms» more  TACAS 1998»
15 years 11 months ago
Detecting Races in Relay Ladder Logic Programs
Relay Ladder Logic (RLL) [4] is a programming language widely used for complex embedded control applications such as manufacturing and amusement park rides. The cost of bugs in RLL...
Alexander Aiken, Manuel Fähndrich, Zhendong S...
FPL
1997
Springer
130views Hardware» more  FPL 1997»
15 years 11 months ago
Riley-2: A flexible platform for codesign and dynamic reconfigurable computing research
: The paper first proposes requirements for an ideal platform for codesign research. A new board developed at Imperial College, the Riley-2, is shown to meet these requirements. It...
Patrick I. Mackinlay, Peter Y. K. Cheung, Wayne Lu...
EURODAC
1994
IEEE
120views VHDL» more  EURODAC 1994»
15 years 11 months ago
Planar-DME: improved planar zero-skew clock routing with minimum pathlength delay
Clock routing has become a critical issue in the layout design of high-performance systems. We show that the two passes bottom-up and top-down of the DME algorithm 2, 3, 4, 8 can ...
Chung-Wen Albert Tsao, Andrew B. Kahng
LFCS
1992
Springer
15 years 11 months ago
Many-Valued Non-Monotonic Modal Logics
Among non-monotonic systems of reasoning, non-monotonic modal logics, and autoepistemic logic in particular, have had considerable success. The presence of explicit modal operator...
Melvin Fitting
ASPDAC
2009
ACM
112views Hardware» more  ASPDAC 2009»
15 years 10 months ago
Compiler-managed register file protection for energy-efficient soft error reduction
Abstract-- For embedded systems where neither energy nor reliability can be easily sacrificed, we present an energy efficient soft error protection scheme for register files (RF). ...
Jongeun Lee, Aviral Shrivastava
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