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ECRTS
2005
IEEE
16 years 5 days ago
Cache Contents Selection for Statically-Locked Instruction Caches: An Algorithm Comparison
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
Antonio Martí Campoy, Isabelle Puaut, Angel...
RTAS
2005
IEEE
16 years 4 days ago
Timing Analysis of TCP Servers for Surviving Denial-of-Service Attacks
— Denial-of-service attacks are becoming more frequent and sophisticated. Researchers have proposed a variety of defenses, including better system configurations, infrastructure...
V. Krishna Nandivada, Jens Palsberg
ISLPED
2005
ACM
93views Hardware» more  ISLPED 2005»
16 years 3 days ago
Power-aware code scheduling for clusters of active disks
In this paper, we take the idea of application-level processing on disks to one level further, and focus on an architecture, called Cluster of Active Disks (CAD), where the storag...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir
SENSYS
2005
ACM
16 years 3 days ago
Data collection, storage, and retrieval with an underwater sensor network
In this paper we present a novel platform for underwater sensor networks to be used for long-term monitoring of coral reefs and fisheries. The sensor network consists of static a...
Iuliu Vasilescu, Keith Kotay, Daniela Rus, Matthew...
VSTTE
2005
Springer
16 years 20 hour ago
Model Checking: Back and Forth between Hardware and Software
The interplay back and forth between software model checking and hardware model checking has been fruitful for both. Originally intended for the analysis of concurrent software, mo...
Edmund M. Clarke, Anubhav Gupta, Himanshu Jain, He...
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