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ICCD
1999
IEEE
110views Hardware» more  ICCD 1999»
15 years 11 months ago
TriMedia CPU64 Architecture
We present a new VLIW core as a successor to the TriMedia TM1000. The processor is targeted for embedded use in media-processing devices like DTVs and set-top boxes. Intended as a...
Jos T. J. van Eijndhoven, Kees A. Vissers, Evert-J...
CIKM
1999
Springer
15 years 11 months ago
Rule-Based Query Optimization, Revisited
We present the architecture and a performance assessment of an extensible query optimizer written in Venus. Venus is a general-purpose active-database rule language embedded in C+...
Lane Warshaw, Daniel P. Miranker
VLSID
1999
IEEE
99views VLSI» more  VLSID 1999»
15 years 11 months ago
Array Index Allocation under Register Constraints in DSP Programs
Abstract Code optimization for digital signal processors DSPs has been identi ed as an important new topic in system-level design of embedded systems. Both DSP processors and algor...
Anupam Basu, Rainer Leupers, Peter Marwedel
GLVLSI
1998
IEEE
122views VLSI» more  GLVLSI 1998»
15 years 11 months ago
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
Luca Benini, Giovanni De Micheli, Alberto Macii, E...
ISORC
1998
IEEE
15 years 11 months ago
The Time-Triggered Architecture
The Time-Triggered Architecture (TTA) provides a computing infrastructure for the design and implementation of dependable distributed embedded systems. A large real-time applicatio...
Hermann Kopetz
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